Embodiments of the present disclosure relate to a content-addressable memory (CAM), and more particularly, relate to a ternary CAM (TCAM) device and an operating method thereof.
CAM devices may support a read operation, a write operation, and a search operation for data. In the search operation, comparison of search data with entries of data stored in the CAM device may be performed in parallel. For example, during one clock cycle, the search data may be compared with entries of all data stored in the CAM device. When bits of a data entry are respectively matched with bits of the search data, an address of the data entry is output. Here, data of logic “0” or logic “1” may be stored in a data entry of the CAM device.
The TCAM device performs a function similar to the CAM device. However, as well as logic “0” and logic “1”, a “don't care” bit (hereinafter referred to as a “DC bit”) may be further stored in the data entry of the TCAM device. A memory cell in which the “DC” bit is stored is not compared with search data. That is, regardless of the search data, a memory cell in which the “DC” bit is stored always outputs a matching result.
TCAM devices may be implemented using resistive memory elements. A low resistance ratio between resistive memory elements is required to implement the TCAM devices with a high-speed and low-power characteristic. However, due to the low resistance ratio, it is difficult to secure a sufficient difference (a voltage margin or a sensing margin) between a matching line voltage for matching and a matching line voltage for mismatching.